Academic and Research

ACADEMIC (15 yrs of experience in various subjects)

1. Executed innovative methods of Teaching.

2. Published Manuals and Books for “Electrical Machines” copy right 2000&2001 Anuradha publications, Chennai

3. Established all the relevant Labs under Anna University Curriculum

4. Given more than 90% in all the subjects handled

5. Initiated number of curricular and co-curricular activities in the campus

6. Organized FDP programme sponsored by AICTE and Anna university

7. Guided more than 25 projects

RESEARCH (5 yrs of experience)

1. Modeling and Simulation of DSTATCOM system

2. Simulation of various PWM techniques and controls

3. IGBT and MOSFET selection

4. Technical support for Students during Project phase

5. Test and measurement analysis using LabVIEW

PROFESSIONAL BODIES

1. Life Member of ISTE

2. Life Member of IEEE

3. Member of IAENG

4. Fellow Member IE

5. Member IETE

PROJECT PROFILE

Projects Executed at UG Level

Project Name : Automation of Cane Feeding Section (for Sugar Factory)

Tasks : Development of analog circuit design (op- amp), controller design for Synchronizing four drives namely leveler, cutter, minser and crusher

Internship : Bannari Amman Sugars.

Projects Executed at PG Level

P.G Thesis Phase – I

Title : Design of prototype D-STATCOM for voltage sag mitigation.

Tasks : Development and testing

Duration : 6 months

Abstract : This thesis introduces the design of Distribution STATic COMpensator (D-STATCOM) for load compensation of unbalanced distribution systems. The D-STATCOM is projected to reinstate the widely used Static Var Compensator (SVC). For fast response requirement, feed forward compensation scheme is employed. This enables the D-STATCOM to quickly balance the three-phase unbalanced load and correct the power factor at the same time (”Load Compensation”). The novelty of this compensation scheme is the derivation of algorithm with symmetrical component method (Fast Power Detection). The system block diagram is built accordingly and the simulation is performed using Simulink. The simulation results are presented and compared with the existing methods.

P.G Thesis Phase – II

Title : Modeling and analysis of DSTATCOM for three phase three wire distribution systems.

Tasks : Development and testing

Duration : 6 months

Abstract : This thesis introduces a DSTATCOM (Distribution Static Compensator) for load balancing, power factor correction and voltage regulation in three-phase, distribution system feeding commercial and domestic consumers. A three leg voltage source inverter (VSI) configuration with a dc bus capacitor is employed as DSTATCOM. The modified instantaneous reactive power theory (IRPT) is used in the control of DSTATCOM.

The novelty of this compensation scheme is the derivation of algorithm with symmetrical component method (Fast Power Detection) and modified instantaneous reactive power theory (IRPT) is used in the control of DSTATCOM. The capability of the DSTATCOM is demonstrated through the model developed in MATLAB/ SIMULINK for different types of loads. The simulation results are presented and compared with the existing methods.

Projects Executed at Research Level

Project Name : Investigation on Performance of Hybrid CMC STATCOM for Mitigation of Load Current Harmonics in Medium Voltage Distribution Network

Tasks : Development and Testing

Description : The goal of this research is to achieve high-performance, reliable, flexible, cost-effective power stages and controllers for the CMC-based STATCOM. Major contributions are addressed as follows: 1) Optimized design for the CMC-based STATCOM power stages and passive components, 2) Accurate models of the CMC for reactive power compensations in both ABC and DQ coordinates, 3) DC-link balancing strategies, 4) Improvements in the CMC topology and 5) Analysis of various CMC topology.

To simplify the control system design, well-defined models of the CMC in both ABC and DQ0 coordinates are proposed. In order to balance the DC capacitor voltages, effective Space Vector Pulse Width Modulation (SVPWM) technique, which is suitable for any number of H-bridge converters is proposed With the combination of the decoupling power control and the cascaded SVPWM, a CMC with any number of voltage levels can be simply modeled as a three-level and five-level cascaded converter, which is the simplest topology to deal with. This significantly simplifies and optimizes the control design process. To verify the accuracy of the proposed models and the performance of the control system for the CMC-based STATCOM, five-level cascaded-based STATCOM is implemented in MATLAB/Simulink.